Dechao Guo

Dr. Dechao Guo is Director of Advanced Logic Technology in IBM. He supervises Advanced Logic Technology Research and Technology Enablement from multiple labs in IBM Research including Yorktown Heights, NY, Albany, NY, and Burlington, VT. He leads teams of scientists and engineers across technology definition, technology development, technology qualification, design-technology co-optimization, and technology enablement. He is responsible for logic technology roadmap, for both high-performance and low-power applications in high-performance systems, AI compute and hybrid cloud.

After studying Microelectronics in college at Peking University, Dechao went to Yale University for graduate study in electrical engineering, specialized in high-k metal gate research. After earning Ph.D. degree in 2007, Dechao joined IBM to research, develop and qualify high-k metal gate technology.

Across technology definition, development and qualification, Dechao has played important technical and leadership roles in many generations of technologies, including high-k metal gate, SiGe channel, FinFET, Nanosheet, Vertical Transport Transistors, Nanostack Transistors, subtractive Ru integration. He is also experienced in business partnership development and delivering value to partners and clients. Currently, Dechao is leading the logic technology interlock with IBM infrastructure to support IBM mainframe server product roadmap, Pathfinding Joint Development Alliance program between IBM and Samsung and 2nm Nanosheet Joint Development between IBM and Rapidus.

Dechao’s contributions to advanced high-k metal gate technology built the technology foundation for IBM zEnterprise processors, Power 8 processors, z13 processors. More recently, his contributions to FinFET technology have had a profound impact on IBM’s leadership in Power9, Power10, z14, z15 and z16 processors. Dechao has been recognized by IBM Corporation with many Technical Achievement Awards including Extraordinary-level award for “High-k/Metal Gate Technology – Fundamental Innovation”, Outstanding-level awards for “High-k/Metal gate technology for high performance server and low power mobile applications”, “Comprehensive SiGe FINFET Technology Research and Transfer to Development”, “Identification of Technology Solution and Manufacturing Partner for IBM 7nm Server”.

Dechao joined IBM Thomas J. Watson Research Center as Research Staff Member in 2007. He holds more than 200 US patents, has published more than 50 papers in technical journals and conferences. He was named IBM Master Inventor in 2012. He has given numerous keynote and invited talks at prestigious nanotechnology and CMOS conferences, including SPIE, VLSI-TSA, SEMICON Korea, and SEMICON China. In addition, Dechao has served as committee member for semiconductor technology conferences such as IEEE IEDM.

Dechao received his Ph.D. in Electrical Engineering from Yale University, and B.S. degree from Peking University in Microelectronics, and completed IBM MicroMBA program. Dechao's passions are semiconductor technology advancement and helping talents for tomorrow's world.