Fully subtractive Ru Topvia interconnects with minimum 9 nm-space airgap for RC performance and reliability enhancement as post-Cu interconnects

Abstract

Minimum 18 nm pitch fully subtractive self-aligned Ru Topvia interconnects with embedded airgap have been demonstrated. It has been confirmed that Ru Topvia interconnects with Topvia trimming process can improve dielectric breakdown voltage between vias and adjacent lines, which is essential for future CMOS technologies. Moreover, in comparison to conventional damascene Cu interconnects with low-k, Ru top via interconnects with airgap provided a clear advantage, exhibiting 23% lower capacitance. Furthermore, excellent TDDB performance on subtractive Ru interconnects with 9 nm-space airgap has been obtained and superior EM performance of Ru Topvia interconnects has been achieved.