Nicolas Loubet

Nicolas Loubet received the B.S. and M.S degrees in physics from Paul Sabatier University, Toulouse (Fr.), in 2000 and 2001. In 2003, he received a high-level Engineering degree in the field of Physics and Microelectronics from the National Institute of Applied Sciences (INSA) and the PhD degree in the domain of Materials, Technology and Electronic Devices in 2006. From 2003 to 2008, he joined STMicroelectronics Research and Development group in front-end materials and epitaxy where he was engaged in the development of Advanced Epitaxy of Si and SiGe materials and vapor-phase etching of SiGe for the fabrication of silicon-on-nothing (SON) and Gate-All-Around transistors. In 2008, he joined the Silicon Technology Research Alliance at IBM Research in Albany, NY and the following years, his research focused on Junction and Strain module engineering for the 20nm, 14nm, 10nm, and 7nm CMOS device nodes. In 2015, he became a Senior Engineer and Technical Leader at IBM Research, engaged in material and process development as well as device integration of Gate-All-Around devices for advanced technology nodes. In 2017, he was first author of IBM Technology paper and Press Release “Stacked Nanosheet Gate-All-Around Transistor to Enable Scaling Beyond FinFET”. He is recognized as primary innovator of IBM’s world leading Nanosheet Transistor Technology and contributed to multiple blogs, scientific talks, press articles and invited talks in multiple industry forums. He has published more than 120 papers in journals and conference proceedings and is the holder of more than 400 patents in the domain of epitaxy, semiconductor device and process integration.