EUV patterned gate variation reduction in next generation transistor architectures
- Gopal Kenath
- Martin Burkhardt
- et al.
- 2024
- SPIE Advanced Lithography + Patterning 2024
Luciana received her B.S. in Chemical Engineering from the National University of Mexico, and her PhD from University of Texas at Austin. After post-doctoral work at University of Minnesota and RPI, Luciana joined IBM Microelectronics in 2013. Her early work at IBM focused on establishing the infrastructure around EUV defectivity characterization, including guard-banding EUV exposures from mask adders, and defining films controls for the new EUV materials and patterning stacks. In the early yield ramp of EUV patterning for 7nm, Luciana had major contributions in identifying critical yield detractors and validating patterning solutions which helped deliver the first-of-a-kind EUV interconnect technology demonstration for the 7nm program. Since then, Luciana spearheaded the development of new EUV patterning technologies in Albany with world-class results. Leveraging her understanding of process detractors and the establishment of robust vehicles for technology demonstration, Luciana established a model of collaboration with semiconductor equipment, mask, and materials suppliers to develop and validate new hardware, processes, and materials for EUV technology leveraging IBM’s EUV defectivity and yield expertise. The process and metrology capabilities developed through these activities are being leveraged by all logic scaling programs in Albany today.
In her role as senior technical staff member, Luciana is responsible for continuing to push the limits on IBM’s lithography capabilities and defining strategic roadmap initiatives in logic scaling to deliver on IBM’s and partner needs. In this respect, Luciana has expanded her role to spearhead the mission of accelerating High NA EUV technology adoption for IBM Research and its partners beyond the 2nm node.