About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
VLSI Technology 2021
Conference paper
Dual Damascene BEOL Extendibility With Cu Reflow / Selective TaN And Co/Cu Composite
Abstract
The paper demonstrates the scalability of the dual damascene (DD) integration scheme below 28 nm pitch. We evaluate the performance of the 10 nm wide interconnects build using two process flows (i) Cu reflow with selectively deposited TaN barrier (Cu/R-TaN/SB), (ii) Cobalt/Copper composite (Co/Cu comp). These process innovations enable a significant improvement in via, signal and power line resistances. We discuss the corresponding implications towards performance in terms of signal delay, parasitic voltage, and FPG gain analysis. Our simulations show that the DD Cu interconnects formed using Cu/R-TaN/SB can enable next-generation (20-24nm pitch) low power mobile-like design solutions. The Co/Cu comp with high aspect ratio power rails provides the best performance for high-performance computing (HPC) applications.