Structural and Electrical Demonstration of SiGe Cladded Channel for PMOS Stacked Nanosheet Gate-All-Around Devices

Abstract

In this paper, horizontal gate-all-around (hGAA) devices with a SiGe cladded nanosheet (NS) channel have been explored for their potential benefits of Vt modulation and improved NBTI. The SiGe cladded NS channel was formed through trimming of the Si NS channel followed by selective SiGe epitaxial growth. Selective Si NS channel trimming of 1 - 2 nm per side with low roughness and conformal SiGe cladding epitaxial growth of 2 - 3 nm with good crystallinity were demonstrated. It is shown that a SiGe cladding NS channel provides a reduction of threshold voltage (Vt) and improved reliability. It is also shown that a conformal Si cap grown on the SiGe cladded NS channel suppresses the interface trap density (Dit).