High performance transistors featured in an aggressively scaled 45nm bulk CMOS technologyZ. LuoN. Rovedoet al.2007VLSI Technology 2007
Uniaxial strain relaxation on ultra-thin strained-Si directly on insulator (SSDOI) substratesHaizhou YinZ. Renet al.2006ICSICT 2006
Patterning strategies for gate level tip-tip distance reduction in SRAM cell for 45nm and beyondHaoren ZhuangHelen Wanget al.2007ISTC 2007
Structure, design and process control for Cu bonded interconnects in 3D integrated circuitsKuan-Neng ChenSang Hwui Leeet al.2006IEDM 2006
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Tunable Workfunction for Fully Silicied Gates (FUSI) and Proposed MechanismsY.-H. KimC. Cabral Jr.et al.2006VLSI-TSA 2006
Integration of local stress techniques with strained-Si directly on insulator (SSDOI) substratesHaizhou YinZ. Renet al.2006VLSI Technology 2006
Investigation of FinFET devices for 32nm technologies and beyondH. ShangL. Changet al.2006VLSI Technology 2006
Band-edge high-performance high-κ /metal gate n-MOSFETs using cap layers containing group IIA and IIIB elements with gate-first processing for 45 nm and beyondV. NarayananV.K. Paruchuriet al.2006VLSI Technology 2006