Performance trade-offs in FinFET and gate-all-around device architectures for 7nm-node and beyondSeong-Dong KimMichael Guillornet al.2015S3S 2015
Impact of source/drain silicon cap on FDSOI SiGe pMOSFET performanceE. AugendreS. Maitrejeanet al.2015S3S 2015
Essential edge protection techniques for successful multi-wafer stackingJoshua RubinKevin Winstelet al.2015S3S 2015