Early Scenario Pruning for Efficient Design Space Exploration in Physical Synthesis
- Mohd Anwar
- Sourav Saha
- et al.
- 2016
- VLSID 2016
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45 results for Matt Ziegler
POWER8 design methodology innovations for improving productivity and reducing power
- Matthew M. Ziegler
- Ruchir Puri
- et al.
- 2014
- CICC 2014
Bridging high performance and low power in processor design
- Ruchir Puri
- Mihir Choudhury
- et al.
- 2014
- ISLPED 2014
Bridging high performance and low power in processor design
- Ruchir Puri
- Mihir Choudhury
- et al.
- 2014
- ISLPED 2014
The POWER8™ processor: Designed for big data, analytics, and cloud environments
- Joshua Friedrich
- Hung Le
- et al.
- 2014
- ICICDT 2014
Power reduction by aggressive synthesis design space exploration
- Matthew M. Ziegler
- George D. Gristede
- et al.
- 2013
- ISLPED 2013
LatchPlanner: Latch placement algorithm for datapath-oriented high-performance VLSI designs
- Minsik Cho
- Hua Xiang
- et al.
- 2013
- ICCAD 2013
Network flow based datapath bit slicing
- Hua Xiang
- Minsik Cho
- et al.
- 2013
- ISPD 2013
The opportunity cost of low power design: A case study in circuit tuning
- Matthew M. Ziegler
- Victor V. Zyuban
- et al.
- 2009
- ISLPED 2009
A sub-600mV, fluctuation tolerant 65nm CMOS SRAM array with dynamic cell biasing
- Azeez Bhavnagarwala
- Stephen Kosonocky
- et al.
- 2007
- VLSI Circuits 2007