Poly-Si/high-k gate stacks with near-ideal threshold voltage and mobility
- M.M. Frank
- V.K. Paruchuri
- et al.
- 2005
- VLSI-TSA 2005
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194 results for Vijay Narayanan
Ultra-thin SOI replacement gate CMOS with ALD TaN / high-k gate stack
- B. Doris
- B.P. Linder
- et al.
- 2005
- VLSI-TSA 2005
Thermally robust dual-work function ALD-MN x MOSFETs using conventional CMOS process flow
- D.-G. Park
- Z. Luo
- et al.
- 2004
- VLSI Technology 2004
Systematic study of pFET Vt with Hf-based gate stacks with poly-Si and FUSI gates
- E. Cartier
- V. Narayanan
- et al.
- 2004
- VLSI Technology 2004
Degradation of ultra-thin oxides with Tungsten gates under high voltage: Wear-out and breakdown transient
- F. Palumbo
- S. Lombardo
- et al.
- 2004
- IRPS 2004
Dual work function metal gate CMOS using CVD metal electrodes
- V. Narayanan
- A.C. Callegari
- et al.
- 2004
- VLSI Technology 2004
Dual workfunction fully silicided metal gates
- C. Cabral Jr.
- J. Kedzierski
- et al.
- 2004
- VLSI Technology 2004
Degradation of ultra-thin oxides with tungsten gates under high voltage: Wear-out and breakdown transient
- F. Palumbo
- S. Lombardo
- et al.
- 2004
- IRPS 2004
Epitaxial Si films grown on lattice matched (LaxY 1-x)O3/Si (111) structures by molecular beam epitaxy
- V. Narayanan
- S. Guha
- et al.
- 2002
- MRS Proceedings 2002
Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks
- Sidney Tsai
- Pritish Narayanan
- et al.
- 2023
- ISCAS 2023