Engineering high dielectric constant materials for band-edge CMOS applications
- 2008
- ECS Meeting 2008
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194 results for Vijay Narayanan
High-K gate dielectric structures by atomic layer deposition for the 32nm and beyond nodes
- R.D. Clark
- S. Consiglio
- et al.
- 2008
- ECS Meeting 2008
A cost effective 32nm high-K/metal gate CMOS technology for low power applications with single-metal/gate-first process
- X. Chen
- S. Samavedam
- et al.
- 2008
- VLSI Technology 2008
Extendibility of NiPt silicide to the 22-nm node CMOS technology
- Kazuya Ohuchi
- Christian Lavoie
- et al.
- 2008
- IWJT 2008
High-k/metal gates- from research lab to market reality
- 2008
- Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 2008
High-k/metal Gates- From research to reality
- 2007
- IWPSD 2007
High-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing
- M. Chudzik
- B. Doris
- et al.
- 2007
- VLSI Technology 2007
Materials and process integration issues in metal gate/high-k stacks and their dependence on device performance
- A.C. Callegari
- K. Babich
- et al.
- 2007
- ECS Meeting 2007
Process and electrical characteristics of MO-ALD HfO2 films for high-K gate applications grown in a production-worthy 300 mm deposition system
- R.D. Clark
- C.S. Wajda
- et al.
- 2007
- ECS Meeting 2007
Band edge high-K /metal gate n-MOSFETs using ultra thin capping layers
- V.K. Paruchuri
- V. Narayanan
- et al.
- 2007
- VLSI-TSA 2007