ETSOI CMOS for system-on-chip applications featuring 22nm gate length, sub-100nm gate pitch, and 0.08μm2 SRAM cell
- Kangguo Cheng
- A. Khakifirooz
- et al.
- 2011
- VLSI Circuits 2011
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197 results for Vijay Narayanan
A 0.021 μm2 trigate SRAM cell with aggressively scaled gate and contact pitch
- Michael A. Guillorn
- Josephine Chang
- et al.
- 2011
- VLSI Technology 2011
Full metal gate with borderless contact for 14 nm and beyond
- Soon-Cheon Seo
- L.F. Edge
- et al.
- 2011
- VLSI Technology 2011
Epitaxial strontium oxide layers on silicon for gate-first and gate-last TiN/HfO2 gate stack scaling
- Martin M. Frank
- Chiara Marchiori
- et al.
- 2011
- Microelectronic Engineering
High temperature (1000°C) compatible Y-La-Si-O silicate gate dielectric in direct contact with Si with 7.7 Å equivalent oxide thickness
- Catherine Dubourdieu
- E. Cartier
- et al.
- 2011
- Applied Physics Letters
Millisecond flash annealing as a flatband voltage shift enabler for p-type metal-oxide-semiconductor devices with high-k/metal gate
- Changhwan Choi
- Vijay Narayanan
- 2011
- Electrochemical and Solid-State Letters
Impact of diffusionless anneal using dynamic surface anneal on the electrical properties of a high-k/metal gate stack in metal-oxide-semiconductor devices
- Changhwan Choi
- Kam-Leung Lee
- et al.
- 2011
- Applied Physics Letters
Maximized benefit of LaAlO higher-κ gate dielectrics by optimizing the La/Al atomic ratio
- Hiroaki Arimura
- Stephen L. Brown
- et al.
- 2011
- IEEE Electron Device Letters
Ruthenium based metals using atomic vapor deposition for gate electrode applications
- Changhwan Choi
- Takashi Ando
- et al.
- 2011
- Applied Physics Letters
Epitaxial SrO interfacial layers for HfO2 -Si gate stack scaling
- Chiara Marchiori
- Martin M. Frank
- et al.
- 2011
- Applied Physics Letters