Publications

8 results for A. Waite

Yield monitor for embedded-SiGe process optimization
- - Xu Ouyang
  - Shwu-Jen Jeng
  - et al.
- 2008
- ICSICT 2008
Hole transport in nanoscale p-type MOSFET SOI devices with high strain
- - H. Nayfeh
  - S.-J. Jeng
  - et al.
- 2007
- DRC 2007
(110) Channel, SiON gate-dielectric PMOS with record high I_on=1 mA/μm through channel stress and source drain external resistance (R _ext) engineering
- - B. Yang
  - A. Waite
  - et al.
- 2007
- IEDM 2007
CMOS fabricated by hybrid-orientation technology (HOT)
- - Bin Yang
  - M. Yang
  - et al.
- 2007
- IEDST 2007
High performance 45-nm SOI technology with enhanced strain, porous low-k BEOL, and immersion lithography
- - S. Narasimha
  - K. Onishi
  - et al.
- 2006
- IEDM 2006
High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL
- - W.-H. Lee
  - A. Waite
  - et al.
- 2005
- IEDM 2005
Integration and optimization of embedded-SiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies
- - M. Horstmann
  - A. Wei
  - et al.
- 2005
- IEDM 2005
Body voltage and history effect sensitivity to key device parameters in 90nm PD-SOI
- - S. Kawanaka
  - M.B. Ketchen
  - et al.
- 2004
- IEEE International SOI Conference 2004