Ultra-Compact Computing at the Edge Involving Unobtrusively Small Sub-millimeter Heterogeneous Integration Packaging

Abstract

This paper presents the high throughput heterogeneous integration (HI) chiplet packaging process flow and final builds that resulted in a complete computer system (processor, memory, I/O, energy harvesting power source, sensors, operating system software) on a substrate (< 1mm2). This includes details of bond and assembly material set development and demonstration for entire small chip packaging integration to achieve, for example, temporary wafer bonding and debonding on extremely small die dimensions (100-250μm on a side), and to achieve reliable and high throughput system-on-a-carrier packaging with a diverse set of CMOS, GaN and GaAs chip technologies. The interchangeable compact HI system package builds include chiplet functions containing tamperproof 32 bit processor with memory, analog I/O, with flexibility in supporting on the same package substrate footprint III-V or Si optical sources and detectors, and optical energy harvesting photovoltaics.