Conference paperPerformance elements for 28nm gate length bulk devices with gate first high-k metal gateJun Yuan, C. Gruensfelder, et al.ICSICT 2010
Conference paperParasitic Resistance Reduction for Aggressively Scaled Stacked Nanosheet TransistorsSu-Chen Fan, Ruilong Xie, et al.IITC 2020
Conference paperIntegrated dual SPE processes with low contact resistivity for future CMOS technologiesHeng Wu, Soon-Cheon Seo, et al.IEDM 2017
Conference paperDual beam laser annealing for contact resistance reduction and its impact on VLSI integrated circuit variabilityZuoguang Liu, Oleg Gluschenkov, et al.VLSI Technology 2017
