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Publication
VLSI Technology 2009
Conference paper
Reduction of RTA-driven intra-die variation via model-based layout optimization
Abstract
Unique hybrid approach employing both model-based layout optimization and process improvement was successfully developed for reducing Rapid Thermal Anneal (RTA) driven intra-die variations. It has been applied to multiple bulk and 501 designs. The model developed herein enables fast estimation of broad-band reflectance of a random layout in 65nm, 45nm, and 32nm nodes and guides reflectance leveling in the post-design phase. This approach significantly reduces RTA-driven variations showing 30% reduction in intra die ring oscillator range in high- performance products.