Performance analysis of tapered gate in PD/SOI CMOS technology
W. Hwang, C.T. Chuang, et al.
VLSI-TSA 2001
A nonquasi-static (NQS) model accounting for intrinsic carrier propagation delays in both B/E and B/C junctions is implemented in the ASTAP circuit simulator to evaluate the impact of non-quasi-static effects in saturated bipolar circuits. It is shown that while the extra delay introduced by the NQS effects during the turn-on transition is primarily due to the normal mode B/E NQS delay time, the more severe NQS delay in the turnoff transition is caused mainly by the removal of the saturation overdrive charges and the longer inverse mode B/C NQS delay time. © 1994 IEEE.
W. Hwang, C.T. Chuang, et al.
VLSI-TSA 2001
R.V. Joshi, S.S. Kang, et al.
VLSID 2005
J.H. Comfort, P.F. Lu, et al.
VLSI Technology 1990
R. Rodríguez, J.H. Stathis, et al.
Microelectronics Reliability