About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
IRPS 2020
Conference paper
NBTI Impact of Surface Orientation in Stacked Gate-All-Around Nanosheet Transistor
Abstract
We report a thorough study of the negative bias temperature instability (NBTI) reliability in stacked gate-all-around (GAA) nanosheet (NS) devices with (100) and (110) top surfaces. We demonstrated that NBTI stresses not only create more permanent defects in (110) than (100) surface due to higher density of Si-H bond but also induce more recoverable damages. Finally, we show that NBTI deteriorates at narrow sheet width in (100) NS but is width independent in (110) NS.