Jason Cong, Lei He, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
In this paper, we develop a multilevel global placement algorithm (MGP) integrated with fast incremental global routing for directly updating and optimizing congestion cost during physical hierarchy generation. Fast global routing is achieved using a fast two-bend routing and incremental A-tree algorithm. The routing congestion is modeled by the wire usage estimated by the fast global router. A hierarchical area density control is developed for placing objects with significant size variations. Experimental results show that, compared to GORDIAN-L, the wire length-driven MGP is 4-6.7 times faster and generates slightly better wire length for test circuits larger than 100000 cells. Moreover, the congestion-driven MGP improves wiring overflow by 45%-74% with 5% larger bounding box wire length but 3%-7% shorter routing wire length measured by a graph-based A-tree global router.
Jason Cong, Lei He, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Ruchir Puri, Eshel Haritan, et al.
DAC 2009
Jason Cong, Tianming Kong, et al.
IEEE Transactions on VLSI Systems
Jason Cong, N.S. Nagaraj, et al.
DAC 2009