Conference paper
Single pulse output of partially depleted SOI FETs
Keith A. Jenkins, Y. Taur, et al.
IEEE International SOI Conference 1996
The measurement of the accumulated phase error of phase-locked loops (PLLs) in microprocessor systems is discussed. A system which creates controlled power supply noise and measures the PLL response is described. Examples of the use of this technique are shown for a PLL used in a 400MHz microprocessor.
Keith A. Jenkins, Y. Taur, et al.
IEEE International SOI Conference 1996
Y. Taur, S.J. Wind, et al.
IEDM 1993
Y. Mii, S. Rishton, et al.
IEEE Electron Device Letters
B.H. Lee, A.C. Mocuta, et al.
IEDM 2002