Kirsten E. Moselund, D. Cutaia, et al.
NMDC 2016
We demonstrate and characterize junctionless tri-gate InGaAs MOSFETs, fabricated using a simplified process with gate lengths down to L g = 25 nm at a nanowire dimension of 7 - 16 nm2. These devices use a single 7-nm-thick In0.80Ga0.20As (N D = 1 - 1019 cm-3) layer as both channel and contacts. The devices show SSsat = 76 mV/dec, peak g m = 1.6 mSm and I ON = 160A/m (at I OFF = 100 nA/m and V DD = 0.5 V), the latter which is the highest reported value for a junctionless FET. We also show that device performance is mainly limited by high parasitic access resistance due to the narrow and thin contact layer.
Kirsten E. Moselund, D. Cutaia, et al.
NMDC 2016
C. B. Zota, Clarissa Convertino, et al.
IEDM 2018
Mattias Borg, Heinz Schmid, et al.
ACS Nano
B. Mattias Borg, Martin Ek, et al.
Applied Physics Letters