Ultra-Low Power Scaled III-V-on-Si 1T-DRAMs with Quantum Well Heterostructures

Abstract

We demonstrate 1T-DRAMs based on the floating body effect in InGaAs-on-Si FETs. Using optimized quantum well channel heterostructures, retention times are enhanced and overall energy consumption is strongly reduced, resulting in the lowest write and read energies for IT-DRAMs - together with an extremely scaled gate length of 14 nm. Two different channel heterostructures are explored with regards to their impact on memory operation, energy consumption and endurance. The high electron mobility of the channel material enables a refresh power consumption of only 3.9 pW, the lowest reported for a 1T memory and matching state of the art 1T1C DRAM cells. These devices are highly promising for embedded memory applications in III-V high-frequency and future high-performance logic node technologies.