Conference paper
Full metal gate with borderless contact for 14 nm and beyond
Soon-Cheon Seo, L.F. Edge, et al.
VLSI Technology 2011
Ultra-thin oxide reliability has become an important issue in integrated circuit scaling. Present reliability methodology stresses oxides with a low impedance voltage source. This, though, does not represent the stress under circuit configurations, in which transistors are driven by other transistors. A Current Limited Constant Voltage Stress simulates circuit stress well. Limiting the current during the breakdown event reduces the post-breakdown conduction. Limiting the current to a sufficiently low value may prevent device failure, altogether.
Soon-Cheon Seo, L.F. Edge, et al.
VLSI Technology 2011
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IEDM 2005
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