Capacitance-voltage and deep-level-transient spectroscopy characterization of defects near SiO₂/SiC interfaces

Metal-oxide-semiconductor (MOS) interfaces on n-type 4H and 6H-SiC annealed in nitric oxide (NO) for various times were electrically characterized by high-frequency capacitance-voltage and deep-level-transient spectroscopy (DLTS) measurements. Different types of traps were distinguished by DLTS based on the energy-resolved DLTS spectra and comparing DLTS spectra from the two polytypes. Oxide traps, found at much higher densities in the larger bandgap 4H-SiC, are reduced by NO annealing, and their capture behavior is analytically modeled with a tunneling-dependent capture rate. An interface trap distribution is found in 6H-SiC MOS centered at 0.5 eV below the conduction band. Near interface traps in the SiC within 0.1 eV below the conduction band edge, detected at equal concentrations in both polytypes, are not passivated by NO annealing. © 2011 American Institute of Physics.