BiCMOS Technology with 60-GHz n-p-n Bipolar and 0.25-μm CMOS

Abstract

A BiCMOS technology has been developed that integrates a high-performance self-aligned double-polysilicon bipolar device into an advanced 0.25-μm CMOS process. The process sequence has been tailored to allow maximum flexibility in the bipolar device design without perturbation of the CMOS device parameters. Thus n-p-n cutoff frequencies as high as 60 GHz were achieved while maintaining a CMOS ring oscillator delay per stage of about 54 ps at 2.5-V supply, comparable to the performance in the CMOS-only technology. BiCMOS and BiNMOS circuits were also fabricated. BiNMOS circuits exhibited ≈ 45% delay improvement compared to CMOS-only circuits under high load conditions at 2.5 V. © 1992 IEEE