About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
IEDM 2004
Conference paper
Advanced gate stacks with fully silicided (FUSI) gates and high-κ dielectrics: Enhanced performance at reduced gate leakage
Abstract
The key result in this work is that FUSI/HfSixOy gate stacks offer both significant gate leakage reduction (due to high-κ) and drive current improvement at Tinv ∼ 2 nm (due to: (i) elimination of poly depletion effect, ∼ 0.5 nm, and (ii) the high mobility of HfSi xOy). We also demonstrate that threshold voltage for both PFETs and NFETs can be adjusted from midgap to the values of Vt(PFET)∼ -0.4 V and Vt(NFET) ∼ + 0.3 V by poly-Si predoping by implantation (Al or As) and FUSI alloying. Significantly improved charge trapping (Vt stability) was found in the case of NiSi/ HfSixOy compared to the same gate electrode with HfD2 dielectric. ©2004 IEEE.