Haoran Qiu, Weichao Mao, et al.
ASPLOS 2024
Via metal corrosion during via CMP is one of the major process challenges for S/D (single damascene) interconnects. Thus, the detailed mechanism of via metal corrosion during via CMP have been investigated and a novel via process has been proposed to demonstrate via metal corrosion-free S/D interconnects. The via metal corrosion-free S/D interconnect could achieve improved viachain yield and enhanced EM (electromigration) performance compared to D/D (dual damascene) interconnect due to an ideal via profile and better Cu fill capability.
Haoran Qiu, Weichao Mao, et al.
ASPLOS 2024
Deming Chen, Alaa Youssef, et al.
arXiv
Jose Manuel Bernabe' Murcia, Eduardo Canovas Martinez, et al.
MobiSec 2024
Sahil Suneja, Yufan Zhuang, et al.
ACM TOSEM