A model for gate-oxide breakdown in CMOS inverters

Abstract

The effect of oxide breakdown (BD) on the performance of CMOS Inverters has been investigated. The results show that the inverter performance can be affected by the BD in a different way depending on the stress polarity applied to the inverter input. In all the cases, the oxide BD conduction has been modeled as gate-to-diffusion leakage with a power-law formula of the type I = KVp, which was previously found to describe the BD in capacitor structures. This implies that the BD physics at oxide level is the same as that at circuit level.