Shu-Jen Han, Dharmendar Reddy, et al.
ACS Nano
Paper
A 26.5 GHz Silicon MOSFET 2:1 Dynamic Frequency Divider
Abstract
A bulk silicon divide-by-two dynamic frequency divider with maximum clock speed of 26.5 GHz has been achieved. The dynamic divider operates from 6.5 GHz to 26.5 GHz. The design is based on n-channel MOSFET's with an effective gate length of 0.1 µm. © 2000, The Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
Related
Conference paper
Perimeter effects in small geometry bipolar transistors
Wai Lcc, Jack Y.-C. Sun, et al.
VLSI Technology 1992
Joachim N. Burghartz, Keith A. Jenkins, et al.
IEEE Electron Device Letters
Franco Stellari, Keith A. Jenkins, et al.
IRPS 2015