Implementation of robust nickel alloy salicide process for high-performance 65nm SOI CMOS manufacturingJay StraneDavid Brownet al.2007VLSI-TSA 2007
Asymmetrical SRAM cells with enhanced read and write marginsKeunwoo KimJae-Joon Kimet al.2007VLSI-TSA 2007
Band edge high-K /metal gate n-MOSFETs using ultra thin capping layersV.K. ParuchuriV. Narayananet al.2007VLSI-TSA 2007