POWER7™ local clocking and clocked storage elements
- James Warnock
- Leon Sigal
- et al.
- 2010
- ISSCC 2010
Publications
9 results for A.J. Kleinosowski
Design implications of single event transients in a commercial 45 nm SOI device technology
- Aj Kleinosowski
- Ethan H. Cannon
- et al.
- 2008
- IEEE TNS
Multi-bit upsets in 65nm SOI SRAMs
- Ethan H. Cannon
- Michael S. Gordon
- et al.
- 2008
- IRPS 2008
Circuit design and modeling for soft errors
- A.J. KleinOsowski
- Ethan H. Cannon
- et al.
- 2008
- IBM J. Res. Dev
The impact of aging effects and manufacturing variation on SRAM soft-error rate
- Ethan H. Cannon
- A.J. KleinOsowski
- et al.
- 2008
- IEEE T-DMR
Latch design techniques for mitigating single event upsets in 65 nm SOI device technology
- A.J. KleinOsowski
- Ethan H. Cannon
- et al.
- 2007
- IEEE TNS
Protecting big blue from rogue subatomic particles
- Ethan H. Cannon
- A.J. KleinOsowski
- et al.
- 2007
- ICICDT 2007
Modeling single-event upsets in 65-nm silicon-on-insulator semiconductor devices
- A.J. KleinOsowski
- Phil Oldiges
- et al.
- 2006
- IEEE TNS
Exploring fine-grained fault tolerance for nanotechnology devices with the recursive nanobox processor grid
- A.J. Kleinosowski
- Vasudev V. Pai
- et al.
- 2006
- IEEE TNANO