RaPiD: AI Accelerator for Ultra-Low Precision Training and Inference
- Swagath Venkataramani
- Vijayalakshmi Srinivasan
- et al.
- 2021
- ISCA 2021
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11 results for Saekyu Lee
A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC
- Monodeep Kar
- Joel Silberman
- et al.
- 2024
- ISSCC 2024
Functional Testing of AI Cores through Thinned 3D I/O Buffer Dies in 3D Die-Stacked Modules
- Mukta Farooq
- Arvind Kumar
- et al.
- 2022
- ECTC 2022
A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling
- Ankur Agrawal
- Saekyu Lee
- et al.
- 2021
- ISSCC 2021
SMIV: A 16-nm 25-mm SoC for IoT With Arm Cortex-A53, eFPGA, and Coherent Accelerators
- Sae Kyu Lee
- Paul N. Whatmough
- et al.
- 2022
- IEEE JSSC
A 7-nm Four-Core Mixed-Precision AI Chip with 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling
- Sae Kyu Lee
- Ankur Agrawal
- et al.
- 2021
- IEEE JSSC
DNN Engine: A 28-nm Timing-Error Tolerant Sparse Deep Neural Network Processor for IoT Applications
- Paul N. Whatmough
- Saekyu Lee
- et al.
- 2018
- IEEE JSSC
A 16nm 25mm2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators
- Paul N. Whatmough
- Saekyu Lee
- et al.
- 2019
- VLSI Circuits 2019
A Wide Dynamic Range Sparse FC-DNN Processor with Multi-Cycle Banked SRAM Read and Adaptive Clocking in 16nm FinFET
- Saekyu Lee
- Paul N. Whatmough
- et al.
- 2018
- ESSCIRC 2018
Power-Limited Inference Performance Optimization Using a Software-Assisted Peak Current Regulation Scheme in a 5-nm AI SoC
- Monodeep Kar
- Joel Silberman
- et al.
- 2024
- IEEE Journal of Solid-State Circuits