Publications

14 results for Ehsan Degan

DECASTE: Unveiling Caste Stereotypes in Large Language Models through Multi-Dimensional Bias Analysis
- - Prashanth Vijayaraghavan
  - Soroush Vosoughi
  - et al.
- 2025
- IJCAI 2025
AUTOCIRCUIT-RL: Reinforcement Learning-Driven LLM for Automated Circuit Topology Generation
- - Prashanth Vijayaraghavan
  - Luyao Shi
  - et al.
- 2025
- ICML 2025
Enhancing LLMs for HDL Code Optimization using Domain Knowledge Injection
- - Che-ming Chang
  - Prashanth Vijayaraghavan
  - et al.
- 2025
- DAC 2025
CIRCUITSYNTH-RL: LLM-Based Circuit Topology Synthesis with RL Refinement
- - Prashanth Vijayaraghavan
  - Luyao Shi
  - et al.
- 2025
- DAC 2025
RTLExplain: A Structured Approach to RTL Code Summarization and Question Answering for Medium-to-Large Designs Using LLMs
- - Ting-hsun (Austin) Chi
  - Charles Mackin
  - et al.
- 2025
- DAC 2025
DiReC: Enhancing VHDL Code Generation and Summarization with Divide-Retrieve-Conquer Strategy
- - Prashanth Vijayaraghavan
  - Apoorva Nitsure
  - et al.
- 2025
- DAC 2025
Chain-of-Descriptions: Improving Code LLMs for VHDL Code Generation and Summarization
- - Prashanth Vijayaraghavan
  - Apoorva Nitsure
  - et al.
- 2024
- MLCAD 2024
VHDL-Eval: A Framework for Evaluating Large Language Models in VHDL Code Generation
- - Prashanth Vijayaraghavan
  - Luyao Shi
  - et al.
- 2024
- LAD 2024
CircuitSynth: Leveraging Large Language Models for Circuit Topology Synthesis
- - Prashanth Vijayaraghavan
  - Luyao Shi
  - et al.
- 2024
- LAD 2024
Data-free Model Fusion with Generator Assistants
- - Luyao Shi
  - Prashanth Vijayaraghavan
  - et al.
- 2024
- CVPR 2024