A 6.4Gb/s CMOS SerDes core with feedforward and decision-feedback equalization
- M. Sorna
- T. Beukema
- et al.
- 2005
- ISSCC 2005
Publications
5 results for P.J. Murfet
A 6.4Gb/s CMOS SerDes core with feedforward and decision-feedback equalization
- M. Sorna
- T. Beukema
- et al.
- 2005
- ISSCC 2005
A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization
- Troy Beukema
- Michael Sorna
- et al.
- 2005
- IEEE Journal of Solid-State Circuits
A 400Mb/s clock and data recovery PLL system in a 0.5UM CMOS asic process
- J.S.B. Mason
- P.J. Murfet
- et al.
- 1999
- IEE Colloquium (Digest)
Serial storage architecture
- I.D. Judd
- P.J. Murfet
- et al.
- 1996
- IBM J. Res. Dev