Publication
BCTM 2003
Conference paper
Vertical SiGe-base bipolar transistors on CMOS-compatible SOI substrate
Abstract
We present a comprehensive study of the DC, RF and circuit performance of vertical SiGe-base npn bipolar transistors on 120nm SOI. It includes the sensitivity of device performance to collector doping Nc, layout, and SOI substrate bias. At large positive substrate bias, measured peak fT, fMAX and ECL ring oscillator speed for nominal 180nm devices are 60GHz, 57GHz and 20psec for Nc=1.5×1017/cm3 respectively, and 71GHz, 54GHz and 18psec for Nc=4.8×1017/cm3 respectively. Projected fT for a scaled 100nm device on 55nm SOI approaches 200GHz.