Aditya Bansal, Keunwoo Kim, et al.
ICICDT 2007
In this work, impact of device variability for silicon nanowire FETs is assessed and SRAM design implication is presented based on 3-D numerical simulation. Both the conventional and junctionless nanowire FETs are shown to be sensitive to structural variation whereas the former is more tolerable. Both the circular wire and non-circular wire cases for feasible SRAM design with a focus on read noise margin are included in our study.
Aditya Bansal, Keunwoo Kim, et al.
ICICDT 2007
Meng-Hsueh Chiang, Keunwoo Kim, et al.
IEEE International SOI Conference 2004
Phil Oldiges, Ken Rodbell, et al.
IRPS 2015
Saibal Mukhopadhyay, Keunwoo Kim, et al.
IEEE Journal of Solid-State Circuits