Thin-Film Silicon Heterojunction FETs for Large Area and Flexible Electronics: Design Parameters and Reliability

Abstract

The design parameters and reliability of thin-film heterojunction FET (HJFET) devices comprised of hydrogenated amorphous Si (a-Si:H) gate-stacks on crystalline Si (c-Si) substrates are discussed. It is shown that the pinchoff voltage of the HJFET can be adjusted over a wide range of voltages, the gate leakage can be reduced both by improving the a-Si:H growth conditions and reducing the gate area, and the gate capacitance can be adjusted by proper layout design. In addition, high-voltage bias effects including breakdown are investigated, and the pinchoff voltage stability is evaluated by accelerated testing and long-term measurements. It is found that even though the HJFET is intended for low operation voltages, it performs well at relatively high voltages. It is also found that the HJFET is a highly stable device and, therefore, promising for demanding applications, such as active-matrix organic light-emitting diode displays. In addition, due to a low process temperature limited to 200 °C, the HJFET is promising to enable the use of low cost and flexible substrates.