Conference paperWire delay variability in nanoscale technology and its impact on physical designSani R. Nassif, Gi-Joon Nam, et al.ISQED 2013
Conference paperArchitecting Voltage Islands in Core-Based System-on-a-Chip DesignsJingcao Hu, Youngsoo Shin, et al.ISLPED 2004
PaperOptimal decoupling capacitor sizing and placement for standard-cell layout designsHaihua Su, Sachin S. Sapatnekar, et al.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
PaperT-VEMA: A Temperature-and Variation-Aware Electromigration Power Grid Analysis ToolDi-An Li, Malgorzata Marek-Sadowska, et al.IEEE Transactions on VLSI Systems
