Marco Bellini, Bongim Jun, et al.
IEEE TNS
Conference paper
Substrate bias effects in vertical SiGe HBTs fabricated on CMOS-compatible thin film SOI
Abstract
A comprehensive investigation of substrate bias effects on device performance, thermal properties, and reliability of vertical SiGe HBTs fabricated on CMOS-compatible, thin-film SOI, is presented for the first time. Calibrated 2-D MEDICI simulations are used to support our explanations, and the resultant device design trade-offs encountered in building SiGe HBTs on thin-film SOI are quantitatively assessed. ©2005 IEEE.
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