Variability analysis for sub-100nm PD/SOI sense-amplifier
Saibal Mukhopadhyay, Rajiv V. Joshi, et al.
ISQED 2008
Impact of strained silicon effects in double-gated FinFET structures on static random access memory (SRAM) cell functionality is presented. Three FinFET silicon-on-insulator (SOI) SRAM cell embodiments representing unstrained, strained, and NFET-only-strained devices are compared against a planar PDSOI SRAM cell design. The metrics encompass both static and dynamic behavior of the cell and are analyzed through 2-D process hardware-calibrated device models (Lg = 25 nm). The key findings of this letter are: 1) PFET devices with tensile strain are found to degrade the FinFET cell Read Noise Margin and cell ability to write a strong "1"; 2) by restricting the tensile strain to the NFET devices FinFET SRAM cell Read stability and access times improve by 10%-20% relative to their unstrained FinFET and NFET-only strained PDSOI counterparts. © 1980-2012 IEEE.
Saibal Mukhopadhyay, Rajiv V. Joshi, et al.
ISQED 2008
Ajay N. Bhoj, Rajiv V. Joshi
IEEE Electron Device Letters
C.Sture Petersson, Harry J. Whitlow, et al.
Nuclear Inst. and Methods in Physics Research, B
Gerard Touma, Rouwaida Kanj, et al.
ICICDT 2014