Charles J. Alpert, Anirudh Devgan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Buffer insertion is essential for achieving timing closure. This work studies buffer insertion under two types of constraints: (i) avoiding blockages, and (ii) inserting buffers into pre-determined buffer bay regions. We propose a general Steiner tree routing problem to drive this application and present a maze-routing based heuristic. We show that this approach leads to useful solutions on industry designs.
Charles J. Alpert, Anirudh Devgan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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DAC 2006
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IEEE TCAS-II
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ISPD 2018