Phillip J. Restle, Albert E. Ruehli, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The large number of coupled lines in an interconnect structure is a serious limiting factor in simulating high-speed circuits. A new method is presented for efficient simulation of large interconnects based on transverse partitioning and waveform relaxation techniques. The computational cost of the proposed algorithm grows linearly with the number of coupled lines. In addition, the algorithm is highly suitable for parallel implementation leading to further significant reduction in the computational complexity. © 2006 IEEE.
Phillip J. Restle, Albert E. Ruehli, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Martin J. Gander, Albert E. Ruehli
EMC 2003
Xiaoxiong Gu, Albert E. Ruehli, et al.
EPEPS 2008
Arvind R. Sridhar, Natalie M. Nakhla, et al.
IEEE Trans Electromagn Compat