The DX centre
T.N. Morgan
Semiconductor Science and Technology
Active clamp circuits are essential to minimize electrical overshoot and undershoot and minimize reflected signals and achieve performance objectives and reliability requirements in high performance CMOS circuits. This paper discusses for the first time the electrostatic discharge (ESD) protection circuits of silicon-on-insulator (SOI) active clamp networks, dynamic threshold MOSFET SOI ESD techniques and the synthesis of DTMOS concepts, ESD protection networks and active clamp circuitry for high-pin-count high-performance semiconductor chips. © 2002 Elsevier Science B.V. All rights reserved.
T.N. Morgan
Semiconductor Science and Technology
Andreas C. Cangellaris, Karen M. Coperich, et al.
EMC 2001
F.J. Himpsel, T.A. Jung, et al.
Surface Review and Letters
Frank Stem
C R C Critical Reviews in Solid State Sciences