About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
IEDM 2004
Conference paper
Selectively formed high mobility strained Ge PMOSFETs for high performance CMOS
Abstract
For the first time, we have integrated strained germanium (s-Ge) channel PMOSFETs with conventional CMOS processes including shallow trench isolation (STI) and scaled thin gate dielectrics. The selectively formed thin s-Ge channels are realized on pre-patterned SiGe on insulator (SGOI) regions by local thermal mixing (TM) or selective UHVCVD process. The thinnest SiO 2 on the s-Ge is achieved by low temperature remote plasma oxidation of a thin Si cap. As a result, 3X drive current enhancement is demonstrated on the fabricated s-Ge channel PMOSFETs over the Si controls. In addition, an appropriate threshold voltage (Vth) is demonstrated on the HfO 2/P+ poly Si gate PMOSFETs when using an s-Ge channel. ©2004 IEEE.