Wanki Kim, Matthew BrightSky, et al.
IEDM 2016
The Solid State Phase Change Memory (PCM) technology has been trying to take hold since the early 2000s. Numerous university and industry groups researched the right combination of phase change materials, device structures, and access devices which could prove out the promise of a memory technology capable of bridging the density-performance gap between DRAM and Solid State Hard drives (and later NAND flash), Along the way, larger and larger demonstrations have been achieved and products have been launched with varying degrees of longevity. 2D architectures utilizing Si-substrate based access devices (FETs, diodes, bipolar junctions) expanded into 3D stackable architectures enabled by BEOL-compatible threshold voltage based access devices (eg. OTS). This lead to a new field of Selector-Only Memory devices (which remove the PCM material altogether) that may one day be capable of implementation in a truly 3D manor to enable leading edge memory densities and high performance. Even so, there are still application spaces which can utilize PCM’s unique capability for a relatively high density, low cost 2D embedded memory solution.
Besides the mainstream memory applications, there has been another strong driving force of enabling PCM as an analog resistive element for In-Memory Compute [1]. AI Inference applications have become highly utilized, advantageous, and pervasive, but typically at the cost of high power consumption. Edge applications, with strict power consumption requirements, offer a possible application space for PCM to impact. The main challenge for PCM here is to achieve a high enough density capable of supporting the application model size. Recently, IBM has demonstrated feasibility and advantage of PCM-based In-Memory Compute architectures at relatively large scales [2,3].
This talk will give an overview of the PCM materials and device structures and their interactions in our pursuit of optimizing PCM for the Analog In-Memory Compute Applications.
REFERENCES [1] Abu Sebastian et al., Journal of Applied Physics 124, 111101 (2018); doi: 10.1063/1.5042413 [2] Le Gallo, M., Khaddam-Aljameh, R., Stanisavljevic, M. et al. A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference. Nat Electron 6, 680–693 (2023). https://doi.org/10.1038/s41928-023-01010-1 [3] Ambrogio, S., Narayanan, P., Okazaki, A. et al. An analog-AI chip for energy-efficient speech recognition and transcription. Nature 620, 768–775 (2023). https://doi.org/10.1038/s41586-023-06337-5
Wanki Kim, Matthew BrightSky, et al.
IEDM 2016
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