Patterned cracks improve yield in the release of compliant microdevices from silicon-on-insulator wafers

Abstract

The safe release of compliant structures is an ongoing challenge in microfabrication. The buried oxide (BOX) layer of silicon-on-insulator wafers is useful as an etch stop or sacrificial layer. However, when freed during processing, the BOX layer can buckle and crack from compressive stress, and these cracks can threaten the survival of delicate devices above the BOX layer. This work reports on the use of cracks patterned lithographically into the BOX layer prior to device release in two separate microcantilever fabrication processes. In both processes, the patterned cracks were found to inhibit spontaneous cracking in critical regions near or under devices and improve device yield. In the first process, the average yield of ultrasoft silicon cantilevers for magnetic resonance force microscopy improved by more than 60%. In the second process, the yield of piezoresistive silicon cantilevers for high-frequency force detection improved by more than 95% with the use of patterned cracks. © 2011 IOP Publishing Ltd.