Shmuel Wimer, Ron Y. Pinter, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Chaining is the ability to pipeline two or more vector instructions on Cray-1 like machines. We show how to optimally use this feature to compute (vector) expression trees in the context of automatic code generation. We present a linear time scheduling algorithm for finding an optimal order of evaluation for a machine with a bounded number of registers. © 1988 IEEE
Shmuel Wimer, Ron Y. Pinter, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
David Bernstein, Haran Boral, et al.
ACM SIGPLAN Notices
David Bernstein, Izidor Gertner
ACM Transactions on Programming Languages and Systems (TOPLAS)
Nissim Francez, Shalom Goldenberg, et al.
ACM SIGPLAN Notices