R.D. Murphy, R.O. Watts
Journal of Low Temperature Physics
During the last half century, a dramatic downscaling of electronics has taken place, a miniaturization that the industry expects to continue for at least a decade. We present efforts to use the self-assembly of one-dimensional semiconductor nanowires1 in order to bring new, high-performance nanowire devices as an add-on to mainstream Si technology. The nanowire approach offers a coaxial gate-dielectric-channel geometry that is ideal for further downscaling and electrostatic control, as well as heterostructure-based devices on Si wafers. © 2006 Elsevier Ltd. All rights reserved.
R.D. Murphy, R.O. Watts
Journal of Low Temperature Physics
Imran Nasim, Melanie Weber
SCML 2024
Lawrence Suchow, Norman R. Stemple
JES
A. Nagarajan, S. Mukherjee, et al.
Journal of Applied Mechanics, Transactions ASME