Conference paperA 500MHz random cycle 1.5ns-latency, SOI embedded DRAM macro featuring a 3T micro sense amplifierJohn Barth, William Reohr, et al.ISSCC 2007
PaperUsing Cryogenic CMOS Control Electronics to Enable a Two-Qubit Cross-Resonance GateDevin Underwood, Joseph A. Glick, et al.PRX Quantum
Conference paperAssembly and packaging of non-bumped 3D chip stacks on bumped substratesBing Dang, Joana Maria, et al.ECTC 2014
PaperA Cryo-CMOS Low-Power Semi-Autonomous Transmon Qubit State Controller in 14-nm FinFET TechnologySudipto Chakraborty, David J. Frank, et al.IEEE JSSC
