Meeting the challenge of multiple threshold voltages in highly scaled undoped FinFETs

Abstract

Undoped FinFETs are of significant technological interest as they mitigate variation from random discrete dopant effects and provide for density and voltage scaling. A key requirement for undoped FinFETs for VLSI system application is the ability to obtain multiple threshold voltages on chip. This brief discusses options to obtain one logic and one SRAM threshold for both NFETs and PFETs in highly scaled undoped fins and shows that achieving such dual thresholds is challenging and requires new solutions such as more than two metal-gate work functions, dual fin thicknesses, or dual channel materials. © 1963-2012 IEEE.