Manufacturing-aware design methodologies for mixed-signal communication circuits

Abstract

Mixed-signal communication circuits are becoming a very common component of systems-on-a-chip as part of modern communication systems. The implementation of DFM and DFT methodologies is critical to enhance communication across the tape-out barrier critical for these circuits. We present a manufacturing-aware design methodology specifically targeting integrated communication circuits in systems-on-a-chip (SoC). The key principle behind the methodology is that flexible design methods which can effectively adjust a design's power consumption and functionality to its application can also provide critical reductions in manufacturing-induced design risk. The methodology is based on the following four techniques: goal-based design that directly relates top level goals with low level manufacturing-dependent parameters; semi-custom voltage-island physical design techniques; adaptive architecture design; and intelligent on-line at-speed monitoring and problem determination techniques. We describe these four methodology features, and illustrate them on a multi-protocol CMOS 3.2 Gbits/second low-power serial communications core. The presented data shows how this methodology results in better and more cost-effective adaptability of the design to manufacturing and post-manufacturing conditions, thereby improving turnaround time, yield, and overall profit.